There are a couple of excellent articles on the effects of sample clock phase noise on DAC and ADC performance from Analog Devices.
Analyzing and Managing the Impact of Supply Noise and Clock Jitter on High Speed DAC Phase Noise
Sampled Systems and the Effects of Clock Phase Noise and Jitter.
Also another good paper from TI.
Why phase noise matters in RF sampling converters.
There is a trend in radio system design towards doing ever more of the signal processing in the digital domain. This has been enabled by DAC, ADC, and signal processing blocks, with ever faster sample rates, driven by the process shrinks as predicted by Moore’s Law. These process shrinks have also delivered lower power consumption making this design approach suitable for battery powered products and easing thermal design issues.
In all analogue radio designs, the phase noise of the local oscillator was key to radio performance. While this is still true of mixed analogue/digital designs, arguably the DAC/ADC clock has become just as important. When these clocks were in the 10s of MHz supplying a good quality clock was achieved by buying a good quality crystal oscillator. Now these clocks are in the 100s of MHz and GHz, achieving low phase noise and hence jitter is not so straight forward, as off-the-shelf crystal oscillators are only available up to about 100MHz. Beyond that oscillator modules use PLL based multipliers which inevitably add phase noise. At Golledge I have designed a 290MHz crystal oscillator using one of their high frequency fundamental mode resonators. Much above this, ultra low phase noise sources must look to other high Q resonators, such as SAW resonators. I hope to write more on this later.
Take a look at this new item about a steel – brass battery. The electrolyte is a potassium hydroxide solution.
Unfortunately the fine details are behind a pay wall.
There is an interesting article in EETimes about chaotic oscillator circuits. It made me think of mobile radio groups where all members run AFC. Designers usually avoid using the receive AFC setting to adjust the transmit frequency, unless there is one known good node in the network that others can synchronise with. When all nodes are equal and transmit frequency is based on the last signal seen, then it has been assumed that the group as a whole will wander off frequency and also may split up. This work suggest there may be some cleaver alternatives.
I’m technical co-ordinator for the next conference of ARMMS. This involves recruiting presenters of technical papers of interest to RF and Microwave engineers and academic researchers. If you would like to present a paper please let me know.
Is Tomorrow’s Embedded-Systems Programming Language Still C?
For those of us who only occasionally write code for a living this is useful update on where the world of programming is going with an emphases on embedded microcontrollers and IoT. Well worth a read.
I’m programme co-ordinator for the next ARMMS conference. The job mainly consists of finding people to present technical papers at the conference. These have to be of specific interest to engineers ond researchers of a RF and microwave background. If you are interested in presenting a paper contact me.
This is an outfit I have been following since they launched a fund raising round on Seedrs. They are now trying again on Crowdcube. It seems just what is needed in the independent consulting world. They are based not to far from me as well.
This site has grown a couple of aliases. You can now get here via my analogue.guru domain or the rfdesign.guru domain.
I’m pleased with getting these. They will help with self promotion and keeping Bayford Systems alive while I’m away working for Golledge Electronics. I can see why I got away with getting analogue.guru, The domain squatters would be using American dictionaries so not have squatted the English version. I am surprised no-one had bagged rfdesign though. It’s such an obvious choice. Perhaps the launch of the guru top level domain (TLD) has not been sufficiently high profile.
I have taken a job with Golledge as their Chief Engineer. This means that I will have very little time to work for Bayford Systems customers. I will be back at a later date with a new and exciting business model.
I have had two main clients, both ex employers. I gave a chat about the largest project. This is taking on work from another contract designer who has been overloaded so was not able to complete the contract himself. The details of the end use are vague as the end client does not want to be identified for commercial reasons.
The original task was to design a radio board around a transceiver chip that had already been chosen. Normally if I were taking on a project like this directly it would start with a quick survey of what is on the market at that time. The world of semiconductor manufacturing is constantly changing, so although I start the search with chip manufacturers I have used before, or have picked up through the trade press, a web search is still needed to check for any new start-ups that might be making something useful. Other components are selected based on my long experience of who produces the best quality parts at a reasonable price and on ease of availability. Design calculations are usually done on a spreadsheet often reusing work I have done before or adding to the collection of formulas from manufacturers application notes or technical literature. Then I can create the first version of the schematic. A specialist software tool is used for this with as well as creating the schematic, it also derives a parts list, often referred to as the Bill Of Materials or BOM, and a netlist. The latter is important in checking the PCB design matches the schematic connectivity.
Its at this point that I usually do the first circuit simulations. The simulation will include additional elements to model the likely effects of the PCB layout. The additional elements are based on rule-of-thumb worked out over my years in the business. Using the simulations, component values can be adjusted to optimise performance. When the results are satisfactory I start the PCB design. The design is done using specialist software (a type a vector drawing package) that is associated with the schematic software. Although there are software packages that automate the PCB design these are not suitable for radio work. After the PCB layout design is complete the tracking can be simulated and the results used to refine the rule of thumb entries in the first simulation. More circuit optimisation may be necessary at this point.
With PCB and Schematic design complete a package of information can be generated for contract manufacturers to use to make the prototypes. I prefer the approach of contracting out the whole component purchase, PCB purchase, and assembly process to one contract manufacturer. In the past this would have been done in house with hand assembly of the boards, but modern components are just too small for this and need robotic placement and soldering.
Testing of the prototypes was held up by software not being available as the customer was too busy with other projects to write it. I therefore bid for the work and won a useful extra contract. The software task revealed problems with chip versions, which had to be resolved by changing the chips on the prototypes to the latest version. The chip manufacturer was most unhelpful, as he would not reveal what the differences in the versions were. The simulation work paid off and the deign needed only a couple of minor tweaks before being ready for delivery.
The customer wanted to do some range tasting so another useful contract was won to box up two of the prototypes and modify my test software to make it suitable for range testing.
In all a useful start for my business and useful software skills picked up along the way.